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1 ?2018 integrated device technology, inc. september 7, 2018 de sc ript ion the idt xl devices (xo and vcxo options) are ultra-precision crystal oscillators with 750 to 890fs typical phase jitter over 12khz to 20mhz bandwidth. available in a wide frequency range from 0.750mhz to 1350mhz, the xl series crystal oscillators utilize a family of proprietary asics, with a key focus on noise reduction technologies. the 3rd order delta sigma modulator reduces noise to the levels that are comparable to traditional bulk quartz and saw oscillators. with short lead-time, low cost, low noise, wide frequency range, excellent ambient performance, the xl devices are an excellent choice over the conventional technologies. the xl (xo option) devices have stabilities as tight as 20ppm and the xl (vcxo option) devices have 50ppm apr. either option provides extremely quick delivery for both standard and custom frequencies. fe a t ure s ? output types: lvds, lvpecl, lvcmos ? phase jitter (12khz to 20mhz): 750fs to 890fs typical ? supply voltage: 2.5v or 3.3v ? package options: 3.2 2.5 1.0 mm (not available for vcxo) 5.0 3.2 1.2 mm 7.0 5.0 1.3 mm ? operating temperature: -20c to +70c frequency stability options: 20, 25, 50, or 100 ppm (xo only) 50ppm apr (vcxo only) ? operating temperature: -40c to +85c frequency stability options: 25, 50, or 100 ppm (xo only) 50ppm apr (vcxo only) ? operating temperature: -40c to +105c (xo only) frequency stability options: 50 or 100 ppm ? kv of 85ppm/volt typical from 0.5vdc to vdd (vcxo only) better than 10% linearity for vc range pin assignm e nt s (x o opt ion) note : to minimize power supply line noise, a 0.01 f bypass capacitor should be placed between v dd (pin 6) and gnd (pin 3) on 6-pin devices, or v dd (pin 4) and gnd (pin 2) on 4-pin devices. t a ble 1 . x o 6 -pin pa c k a ge t a ble 2 . x o 4 -pin pa c k a g e [a] pulled high internally. [b] low = output disabled. see ordering information (xo) for more details. number name description 1e / d nc enable/disable [a][b] no connect 2n c e/d no connect enable/disable [a][b] 3 gnd connect to ground 4o u t o u t p u t 5 out2 complementary output 6v dd supply voltage 123 4 5 6 e/d / nc nc / e/d out out2 vdd gnd number name description 1 e/d enable/disable [a][b] 2 gnd connect to ground 3o u t o u t p u t 4v dd supply voltage 12 3 4 e/d nc out nc vdd gnd x l da t a she e t x l fa m ily of low pha se n oise qua rt z-ba se d pll osc illa t ors
2 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet pin assignm e nt s (v cx o opt ion) note : to minimize power supply line noise, a 0.01 f bypass capacitor should be placed between v dd (pin 6) and gnd (pin 3). t a ble 3 . v cx o 6 -pin pa c k a ge [a] pulled high internally. [b] low = output disabled. see ordering information (vcxo) for more details. number name description 1 vc voltage control 2 e/d enable/disable [a][b] 3 gnd connect to ground 4o u t o u t p u t 5 out2 complementary output (nc lvcmos) 6v dd supply voltage 123 4 5 6 vc e/d out out2 vdd gnd
3 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet cont e nt s description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 pin assignments (xo option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 pin assignments (vcxo option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 esd compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 mechanical testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 solder reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 dc electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ac electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 output waveforms C lvds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 output waveforms C lvpecl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 output waveforms C lvcmos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 package outline drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ordering information (xo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ordering information (vcxo). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet absolut e m a x im um ra t ings stresses above the ratings listed below can cause permanent damage to the device. these r atings, which are standard values for idt commercially rated parts, are stress ratings only. functional operation of the device at these or a ny other conditions above th ose indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods can affect product reliability. electrical parameters are guaranteed only ov er the recommended operating temperature ra nge. esd com plia nc e m e c ha nic a l t e st ing solde r re flow profile t a ble 4 . absolut e m a x im um ra t ings item rating v dd -0.5 to +5.0v e/d -0.5v to v dd + 0.5v out -0.5v to v dd + 0.5v storage temperature -55c to 125c maximum junction temperature 125c core current 65ma maximum theta j a ju6 7.0 5.0 1.3 mm 75.9 c/w js6 5.0 3.2 1.2 mm 89.6 c/w jx6 3.2 2.5 1.0 mm 94.7 c/w theta j b 48.6c/w 54.3 c/w 66.8 c/w t a ble 5 . esd com plia nc e human body model (hbm 1000v machine model (mm) 150v t a ble 6 . m e c ha nic a l t e st ing parameter test method mechanical shock drop from 75cm to hardwood surfaceC3 times. mechanical vibration 10C55hz, 1.5mm amplitude, 1 minute sweep; 2 hours each in 3 directions (x, y, z). high temperature burn-in under power at 125c for 2000 hours. hermetic seal he pressure: 4 1kgf/cm 2 2 hour soak. t p 10 seconds max within 5c of 260c peak ramp down not to exceed 6c/s ramp up 3c/s max 120 20 seconds in pre-heating area 50 10 seconds above 225c reflow area 400 seconds max from +25c to 260c peak 25c 160c 180c 225c 260c
5 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet dc ele c t ric a l cha ra c t e rist ic s t a ble 7 . 3 .3 v i dd dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter output type conditions minimum typical maximum units i dd power supply current lvds 100 ma lvpecl 120 lvcmos 0.75mhz to 20mhz. 32 20+mhz to 50mhz. 35 50+mhz to 130mhz. 47 130+mhz to 200mhz. 55 200+mhz to 250mhz. 60 t a ble 8 . 2 .5 v i dd dc ele c t ric a l cha ra c t e rist ic s v dd = 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter output type conditions minimum typical maximum units i dd power supply current lvds 0.75mhz to 20mhz. 26 ma 20+mhz to 220mhz. 34 220+mhz to 630mhz. 44 630+mhz to 1000mhz. 65 lvpecl 0.75mhz to 20mhz. 33 20+mhz to 220mhz. 41 220+mhz to 630mhz. 63 630+mhz to 1000mhz. 72 lvcmos 0.75mhz to 20mhz. 22 20+mhz to 50mhz. 25 50+mhz to 100mhz. 29 100+mhz to 130mhz. 32 130+mhz to 160mhz. 35 160+mhz to 180mhz. 37
6 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet t a ble 9 . lv ds dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v od differential output voltage v dd = 3.3v 5%. 0.6 v v dd = 2.5v 5%. 0.4 v os output offset voltage v dd = 3.3v 5%. 1.3 v dd = 2.5v 5%. 1.25 v ih enable/disable input high voltage (output enabled) 7 0 % v dd v il enable/disable input low voltage (output disabled) 3 0 % v dd t a ble 1 0 . lv pecl dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v od differential output voltage v dd = 3.3v 5%. 2.055 2.405 v v dd = 2.5v 5%. 1.4 v os output offset voltage v dd = 3.3v 5%. 1.305 1.65 v dd = 2.5v 5%. 0.68 v ih enable/disable input high voltage (output enabled) 7 0 % v dd v il enable/disable input low voltage (output disabled) 3 0 % v dd
7 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet t a ble 1 1 . lv cm os dc ele c t ric a l cha ra c t e rist ic s v dd = 3.3v, 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. below are guaranteed for listed standard frequencies. symbol parameter conditions minimum typical maximum units v oh output high voltage v dd = 3.3v 5%. 0.75mhz to 150mhz. 90% v dd v 150+mhz to 250mhz. 80% v dd v dd = 2.5v 5%. 0.75mhz to 160mhz. 90% v dd 160+mhz to 180mhz. 80% v dd v ol output low voltage v dd = 3.3v 5%. 0.75mhz to 150mhz. 10% v dd 150+mhz to 250mhz. 20% v dd v dd = 2.5v 5%. 0.75mhz to 160mhz. 10% v dd 160+mhz to 180mhz. 20% v dd v ih enable/disable input high voltage (output enabled) 7 0 % v dd v il enable/disable input low voltage (output disabled) 3 0 % v dd
8 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet ac ele c t ric a l cha ra c t e rist ic s t a ble 1 2 . 3 .3 v ac ele c t ric a l cha ra c t e rist ic s v dd = 3.3v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units f output frequency range lvds. 0.75 1350 mhz lvpecl. 0.75 1350 lvcmos. 0.75 250 frequency stability temperature = -20c to +70c. 20 100 ppm temperature = -40c to +85c. 25 100 ppm temperature = -40c to +105c. 50 100 ppm aging (1st year) t a = 25c. 3 ppm aging (10 years) t a = 25c. 10 ppm output load lvds. differential. 100 ? lvpecl. v dd - 2.0v. 50 lvcmos. to gnd. 15 pf t st start-up time output valid time after v dd meets minimum specified level. 1 0m s t r output rise time lvds. 20% to 80% vpp. 4 0 0 ps lvpecl. 400 lvcmos. 10% to 90% v dd. 3n s t f output fall time lvds. 80% to 20% vpp. 4 0 0 ps lvpecl. 400 lvcmos. 90% to 10% v dd. 3n s o dc output clock duty cycle lvds. 45 55 % lvpecl. 45 55 lvcmos. f out < 62.5mhz. 45 55 f out < 62.5mhz. 40 60 t oe output enable/ disable time 100 ns j per period jitter, rms lvds. 3 ps lvpecl. 5.8 lvcmos. f out = 125mhz. 5 r j random jitter lvds. 1.3 ps lvpecl. 1.29 lvcmos. f out = 125mhz. 0.6 d j deterministic jitter lvds. 5.8 ps lvpecl. 9.3 lvcmos. f out = 125mhz. 10
9 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet t j total jitter lvds. 23.6 ps lvpecl. 27.7 lvcmos. f out = 125mhz. 19 f jitter phase jitter (12khzC20mhz) lvds. 890 fs lvpecl. 860 lvcmos. f out = 125mhz. 750 t a ble 1 3 . 2 .5 v ac ele c t ric a l cha ra c t e rist ic s v dd = 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units f output frequency range lvds. 0.75 1000 mhz lvpecl. 0.75 1000 lvcmos. 0.75 180 frequency stability temperature = -20c to +70c. 20 100 ppm temperature = -40c to +85c. 25 100 ppm temperature = -40c to +105c. 50 100 ppm aging (1st year) t a = 25c. 3 ppm aging (10 years) t a = 25c. 10 ppm output load lvds. differential. 100 ? lvpecl. v dd - 2.0v. 50 lvcmos. to gnd. 15 pf t st start-up time output valid time after v dd meets minimum specified level. 1 0m s t r output rise time lvds. 20% to 80% vpp. 4 0 0 ps lvpecl. 400 lvcmos. 10% to 90% v dd. 3 . 5n s t f output fall time lvds. 80% to 20% vpp. 4 0 0 ps lvpecl. 400 lvcmos. 90% to 10% v dd. 3n s o dc output clock duty cycle lvds. 45 55 % lvpecl. 45 55 lvcmos. 45 55 t oe output enable/ disable time 100 ns t a ble 1 2 . 3 .3 v ac ele c t ric a l cha ra c t e rist ic s (cont .) v dd = 3.3v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units
10 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet notes for all ac electrical characteristics tables: 1 all jitter values provided at 156.25mhz, unless noted otherwise. j per period jitter, rms lvds. 4 ps lvpecl. 5.12 lvcmos. f out = 125mhz. 3.3 r j random jitter lvds. 1.4 ps lvpecl. 1.36 lvcmos. f out = 125mhz. 1.3 d j deterministic jitter lvds. 9.2 ps lvpecl. 10 lvcmos. f out = 125mhz. 6.7 t j total jitter lvds. 29.2 ps lvpecl. 29.3 lvcmos. f out = 125mhz. 25.6 f jitter phase jitter (12khzC20mhz) lvds. 1040 fs lvpecl. 1200 lvcmos. f out = 125mhz. 850 t a ble 1 3 . 2 .5 v ac ele c t ric a l cha ra c t e rist ic s (cont .) v dd = 2.5v 5%, t a = -20c to +70c; -40c to +85c, -40c to +105c. symbol parameter test condition minimum typical maximum units
11 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet out put wa ve form s C lv ds out put wa ve form s C lv pecl oscillator symmetry output levels/rise time/fall time measurements output 2 output 1 output 2 output 1 50% v pp v oh v ol v od ? period period t r t f 20% to 80% v pp ideally, symmetry should be 50/50 for ? period Cother expressions are 45/5 5 or 55/45 50% v pp v os oscillator symmetry rise time/fall time measurements output 2 output 1 output 2 output 1 50% v pp v oh v ol v oh v ol ? period period t r t f 20% to 80% v pp
12 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet out put wa ve form s C lv cm os
13 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet pa c k a ge out line dra w ings the package outline drawings are appended at the end of this document and are accessible from the links below. the package information is the most current data available. www.idt.com/document/psc/j s6-package-outline-50-x-32-mm-bo dy-11-mm-thick www.idt.com/document/psc/j x6-package-outline-32-x-25-mm-bo dy-09-mm-thick www.idt.com/document/psc/ju6-package-outline-70-x- 50-mm-body-13-mm-thick www.idt.com/document/psc/j s4-package-outline-50-x-32-mm-bo dy-11-mm-thick www.idt.com/document/psc/ju4-package-outline-70-x- 50-mm-body-13-mm-thick www.idt.com/document/psc/j x4-package-outline-32-x-25-mm-bo dy-09-mm-thick orde ring i nform a t ion (x o) xl family ? and ? asic l output ? type 5 package 3 voltage 5 precision 125.000000 frequency i temperature ? range i: industrial ? range: ?\ 40 ? to ? +85 ? c k: extended ? industrial ? range ? : ?\ 40 ? to ? +105 ? c x: extended ? commercial ? range ? : ?\ 20 ? to ? +70 ? c 125.000000 ?? listed ? in ? mhz ? as ? example 3 ? digits ? before ? decimal ? and ??? 6 ? digits ? after ? decimal 000.750000 ?? to ? 000.999999 75khz ? to ? 999.999khz 001.000000 ?? to ? 009.999999 1mhz ? to ? 9.999999mhz 010.000000 ?? to ? 099.999999 10mhz ? to ? 99.999999mhz 100.000000 ?? to ? 999.999999 100mhz ? to ? 999.999999mhz a00.000000 ?? to ? a99.999999 1000mhz ? to ? 1099.999mhz b00.000000 ?? to ? b99.999999 1100mhz ? to ? 1199.999mhz c00.000000 ?? to ? c99.999999 ?? 1200mhz ? to ? 1299.999mhz d00.000000 ?? to ? d50.000000 1300mhz ? to ? 1350mhz 0: ? 100ppm** 5: 50ppm** 6: ? 25ppm 8: 20ppm* 2: ? 2.5 ? vdc ? 5% 3: 3.3 ? vdc ? 5% 3 : 3.2 ? x ? 2.5 ? mm 5: 5.0 ? x ? 3.2 ? mm 7: ? 7.0 ? x ? 5.0 ? mm h: hcmos ? enable/disable ? pin ? 1 j: hcmos ? enable/disable ? pin ? 2 l: ? lvds ? enable/disable ? pin ? 1 m: ? lvds ? enable/disable ? pin ? 2 p: ? lvpecl ? enable/disable ? pin ? 1 q: ? lvpecl ? enable/disable ? pin ? 2 x: ? xhcmos ? comp ? hcmos ? enable/disable ? pin ? 1 y: ? xhcmos ? comp ? hcmos ? enable/disable ? pin ? 2 xl: 1,000 ? fs ? jitter * ? 20ppm ? for ? x ? ( \ 20 ? to ? +70c) ? only. ** ? 100ppm ? and ? 50ppm ? for ? k ? ( \ 40c ? to ? +105c) ? only.
14 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet orde ring i nform a t ion (v cx o) xl family ? and ? asic l output ? type 5 package 3 voltage v 125.000000 frequency i temperature ? range i: industrial ? range: ?\ 40 ? to ? +85 ? c x: extended ? commercial ? range ? : ?\ 20 ? to ? +70 ? c 125.000000 ?? listed ? in ? mhz ? as ? example 3 ? digits ? before ? decimal ? and ??? 6 ? digits ? after ? decimal 000.750000 ?? to ? 000.999999 75khz ? to ? 999.999khz 001.000000 ?? to ? 009.999999 1mhz ? to ? 9.999999mhz 010.000000 ?? to ? 099.999999 10mhz ? to ? 99.999999mhz 100.000000 ?? to ? 999.999999 100mhz ? to ? 999.999999mhz a00.000000 ?? to ? a99.999999 1000mhz ? to ? 1099.999mhz b00.000000 ?? to ? b99.999999 1100mhz ? to ? 1199.999mhz c00.000000 ?? to ? c99.999999 ?? 1200mhz ? to ? 1299.999mhz d00.000000 ?? to ? d50.000000 1300mhz ? to ? 1350mhz v: ? vcxo ? option 2: ? 2.5 ? vdc ? 5% 3: 3.3 ? vdc ? 5% 5: 5.0 ? x ? 3.2 ? mm 7: ? 7.0 ? x ? 5.0 ? mm h: hcmos ? enable/disable l: ? lvds ? enable/disable p: ? lvpecl ? enable/disable xl: 1,000 ? fs ? jitter
disclaimer integrated device te chnology, inc. (idt) and its aff iliated companies (herein referred to as idt) reserve the right to modify the products and/or specific ations described herein at any time, without notice, at idts sole discretion. performance specifications and operati ng parameters of the described products are det ermined in an independent state and are not guaranteed to perform the same way when installed in customer products. the informati on contained herein is provided without representation or warranty of any kind, whether express or implied, incl uding, but not limited to, the suitability of idt's products for any particular purpose, an implied warran ty of merchantability, or non-infringement of the intellectual p roperty rights of others. this documen t is presented only as a guide and does not convey any license under intellectual propert y rights of idt or any third parties. idt's products are not intended for use in applications involvi ng extreme environmental conditions or in life support systems o r similar devices where the failure or malfunction of an idt product can be rea- sonably expected to significantly affect the health or safety of users. anyone using an idt product in such a manner does so at their own risk, absent an express, written agreement by idt. integrated device technology, idt and the idt logo are trademarks or registered trademarks of idt and its subsidiaries in the united states and other c ountries. other trademarks used herein are the property of idt or their respective third party owners. for datas heet type definitions and a glossary of common terms, visit www.idt.com/go/glossary . integrated device technology , inc. all rights reserved. t e c h support www.idt.com/go/support sa le s 1-800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com/go/sales corpora t e h e a dqua rt e rs 6024 silver creek valley road san jose, ca 95138 usa www.idt.com 15 ?2018 integrated device technology, inc. september 7, 2018 xl datasheet re vision h ist ory revision date description of change september 7, 2018 updated frequency stability options value from 20ppm to 25ppm for -40c to +85c xo only. june 25, 2018 ? updated package outline drawings section. may 4, 2018 ? added xo and vcxo options. ? updated description and features sections. ? updated package outline drawings section. ? added vcxo ordering information decoder diagram. january 12, 2018 initial release.

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